| PART |
Description |
Maker |
| UPD424263LLE-A80 UPD424263LLE-A70 UPD424263LG5M-A6 |
20-output, 200-MHz Zero Delay Buffer
16 Kbit (2K x 8) nvSRAM
3.3V Zero Delay Buffer
x16 Fast Page Mode DRAM
Three-PLL General-Purpose EPROM Programmable Clock Generator
Phase-Aligned Clock Multiplier x16快速页面模式的DRAM
|
Cooper Hand Tools
|
| ASM5I23S05AG-1-08-SR ASM5I23S09AF-1-16-SR ASM5I23S |
23S SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V 隆庐SpreadTrak隆炉 Zero Delay Buffer
3.3V ‘SpreadTrak Zero Delay Buffer
3.3V ‘SpreadTrak?/a> Zero Delay Buffer
|
PulseCore Semiconductor
|
| W15202 W152 W152-4G W152-1G W152-2G W152-11G W152- |
Spread Aware(TM)-designed to work with SSFTG reference signals
Spread Aware™, Eight Output Zero Delay Buffer PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
Spread Aware? Eight Output Zero Delay Buffer
Spread Aware?? Eight Output Zero Delay Buffer
Spread Aware垄芒, Eight Output Zero Delay Buffer
|
Cypress Semiconductor, Corp.
|
| CY2308SI-1HT CY2308ZI-1HT CY2308SXI-5HT CY2308SXI- |
3.3V Zero Delay Buffer 3.3零延迟缓冲器
3.3V Zero Delay Buffer 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| MDU12H-4MC3 MDU12H-250MC3 MDU12H-150MC3 MDU12H-30M |
Delay 200 /-10 ns, dual, ECL-interfaced fixed delay line
Delay 150 /-7.5 ns, dual, ECL-interfaced fixed delay line
Delay 250 /-12.5 ns, dual, ECL-interfaced fixed delay line
Delay 125 /-6.2 ns, dual, ECL-interfaced fixed delay line
Delay 100 /-5 ns, dual, ECL-interfaced fixed delay line
DUAL, ECL-INTERFACED FIXED DELAY LINE (SERIES MDU12H) ACTIVE DELAY LINE, TRUE OUTPUT, DSO16
|
DATA DELAY DEVICES INC
Data Delay Devices, Inc.
|
| ISPPACCLK5610AV-01TN48C ISPPACCLK5610AV-01TN48I IS |
In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
5600 SERIES, PLL BASED CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP100 TQFP-100
5600 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 TQFP-48
CLOCK GENERATOR, ISP, SMD, TQFP48; Frequency, clock:10MHz; Temp, op. min:0(degree C); Temp, op. max:70(degree C); Pins, No. of:48; Case style:TQFP / 48; Base number:5610; Packaging type:Peel Pack; Voltage, Vcc:3.3V; Temperature, RoHS Compliant: Yes
In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
|
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
|
| IDT2309-1DC IDT2309-1DCI IDT2309 IDT2309-1HPGI IDT |
3.3V ZERO DELAY CLOCK BUFFER 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
|
INTEGRATED DEVICE TECHNOLOGY INC
Integrated Device Technology, Inc.
IDT[Integrated Device Technology]
|
| NB2308AC1DTR2 NB2308AC1HD NB2308AC1DTG NB2308AC1DG |
3.3V Eight Output Zero Delay Buffer 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
3.3V Eight Output Zero Delay Buffer; Package: SOIC 16 LEAD; No of Pins: 16; Container: Rail; Qty per Container: 48 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
3.3 V Zero Delay Clock Buffer 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
|
Rectron Semiconductor
|
| 3D7010SERIES 3D7010S-80 3D7010S-90 3D7010S-400 |
300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit 整体0 - TAP在固定延迟线
MONOLITHIC 10-TAP FIXED DELAY LINE
Delay 8 /-1.5 ns, monolithic 10-TAP fixed delay line
Delay 9 /-1.7 ns, monolithic 10-TAP fixed delay line
Delay 40 /-4 ns, monolithic 10-TAP fixed delay line
|
Interpower, Corp.
Data Delay Devices Inc
|
| CY23S02 CY23S02-01SC CY23S02-01SI CY23S02SC-1 CY23 |
Spread Aware, Frequency Multiplier and Zero Delay Buffer 23S SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
Clocks and Buffers : Clock Distribution
|
Cypress Semiconductor, Corp.
Cypress Semiconductor Corp.
CYPRESS[Cypress Semiconductor]
|
| IDT2305A |
3.3V ZERO DELAY CLOCK BUFFER
|
IDT
|
|
